Wednesday, June 12, 2002, 10:30 AM - 12:00 PM | Room: 288 SESSION 24    Applications of Reconfigurable Computing    Chair: Ivo Bolsens - Xilinx, Inc., San Jose, CA    Organizers: Grant E Martin, Kurt Keutzer    This session demonstrates that Reconfigurable Computing has come of age. The first paper looks at how multimedia applications will benefit through dynamic reconfiguration of operation level parallelism. The second one builds a case for partial runtime reconfiguration, demonstrated on a networking application. The final paper is a case study in which what might normally be a software testbench for disk drive design is instead built as reconfigurable hardware, giving much higher performance.      24.1 Exploiting Operation Level Parallelism through Dynamically Reconfigurable Datapaths    Speaker(s): Zhining Huang - Princeton Univ., Princeton, NJ    Author(s): Zhining Huang - Princeton Univ., Princeton, NJ Sharad Malik - Princeton Univ., Princeton, NJ      24.2 Dynamic Hardware Plugins for FPGAs with Partial Run-Time Reconfiguration    Speaker(s): John W. Lockwood - Washington Univ., Saint Louis, MO    Author(s): Edson L. Horta - LSI-EPUSP-USP, Sao Paulo, Brazil John W. Lockwood - Washington Univ., Saint Louis, MO Dave Parlour - Xilinx Inc., San Jose, CA David Taylor - Washington Univ., Saint Louis, MO      24.3 A Reconfigurable FPGA-Based Readback Signal Generator For Hard-Drive Read Channel Simulator    Speaker(s): Kia Bazargan - Univ. of Minnesota, Minneapolis, MN    Author(s): Jinghuan Chen - Univ. of Minnesota, Minneapolis, MN Jaekyun Moon - Univ. of Minnesota, Minneapolis, MN Kia Bazargan - Univ. of Minnesota, Minneapolis, MN